Toward a general-purpose analog VLSI neural network with on-chip learning.

Toward a general-purpose analog VLSI neural network with on-chip learning. Research Abstract Details 

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Toward a general-purpose analog VLSI neural network with on-chip learning. Abstract Text:

A J Montalvo,R S Gyurcsik,J J Paulos,

This paper describes elements necessary for a general-purpose low-cost very large scale integration (VLSI) neural network. By choosing a learning algorithm that is tolerant of analog nonidealities, the promise of high-density analog VLSI is realized. A 64-synapse, 8-neuron proof-of-concept chip is described. The synapse, which occupies only 4900 mum(2) in a 2-mum technology, includes a hybrid of nonvolatile and dynamic weight storage that provides fast and accurate learning as well as reliable long-term storage with no refreshing. The architecture is user-configurable in any one-hidden-layer topology. The user-interface is fully microprocessor compatible. Learning is accomplished with minimal external support; the user need only present inputs, targets, and a clock. Learning is fast and reliable. The chip solves four-bit parity in an average of 680 ms and is successful in about 96% of the trials.

Toward a general-purpose analog VLSI neural network with on-chip learning. Publishing Authors By Initials

AJ Montalvo,RS Gyurcsik,JJ Paulos,

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Toward a general-purpose analog VLSI neural network with on-chip learning. Journal Published:

PUBLICATION TYPE: Journal Article

Journal: IEEE transactions on neural networks / a publicati

VOLUME: 8

Page Numbers: 413-23

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ISSN: 1045-9227

DAY: 7

MONTH: 02

YEAR: 1997

Toward a general-purpose analog VLSI neural network with on-chip learning. Information

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LANGUAGE: eng

NlmUniqueID: 101211035

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AFFILIATION: Ericsson Inc., Research Triangle Park, NC.

Country: United States

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MEDLINETA: IEEE Trans Neural Netw

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